Keynote Speaker

• Title:
  Unlocking the Full Potential of 3D NAND Flash

  
  
  
  
  

  Chun Jason Xue, Ph.D.

  Professor, Mohamed bin Zayed University of Artificial Intelligence (MBZUAI), UAE

  
  

  About the Speaker

  Prof. Chun Jason Xue is currently a professor of computer science at MBZUAI university, Abu Dhabi. His research focuses on memory and storage systems. He is current associate editor for ACM Transactions on Embedded Computing Systems, ACM Transaction on CPS, and ACM Transactions on Storage. He is a distinguished member of ACM, and a fellow of IEEE.

  Research Interests

  Professor Jason's research focuses on systems and memories and the consideration of efficiency, reliability, and scalability. His recent work explores cross-layer optimization across storage devices, computer architecture, operating systems, runtimes, and applications. This includes improving the reliability, lifetime, and performance of flash memory and SSDs; developing high-performance I/O and memory-management mechanisms; and rethinking data movement across storage, host memory, and GPUs. He is interested in how OS kernel evolution can be benefited from the latest LLMs.

  Homepage: https://mbzuai.ac.ae/study/faculty/chun-jason-xue/

• Summary

  This talk will present a decade of research on unlocking the full potential of 3D NAND flash storage through cross-layer optimization. As flash storage now dominates data center capacity, the industry faces a fundamental scaling trilemma where higher density simultaneously degrades reliability, performance, and lifetime. The research path begins with deep physical characterization, establishing that accurate understanding of device behavior, including retention, read disturb, and wear, must be the foundation of any optimization. Building on these insights, the work progresses to read performance optimization, exploiting error asymmetry and using designated cells as reliability indicators to achieve near-zero read retry rates. The research then demonstrates that smart data encoding can transform how data interacts with flash physics, turning invalidated data and entropy-aware coding into tools for extending device lifetime. We also challenges the long-held constraint of sequential page programming, showing that strategic reprogramming can fundamentally reshape the write path for significant latency gains. Throughout this progression, the unifying principle is cross-layer co-design: by allowing information to flow between device physics, flash chips, controllers, and applications, it becomes possible to push the Pareto frontier on reliability, performance, and lifetime simultaneously rather than trading one for another. Most recently, we explore the usage of Flash memory in the memory hierarchy of ML inference systems. A preliminary study on HBF will be presented.