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System Model


We consider a DSM system consisting of a number of fail-stop nodes [9], connected through a communication network. Each node consists of a processor, a volatile main memory and a non-volatile secondary memory. The processors in the system do not share any physical memory and communicate by message passing. However, the system can be viewed as a set of processes communicating through the logically shared memory space, which is composed of the distributed local memorys of the nodes. The distributed shared memory space is assumed to consist of a set of fixed-size pages. The communication subsystem is assumed to be reliable, however, no assumption is made on the message delivery order. Failures considered in the system are transient and a number of concurrent node failures may happen in the system.


The computation of a process is assumed to be piece-wise deterministic; that is, the computational states of a process is fully determined by a sequence of data values provided for the sequence of read operations. For the memory consistency, the invalidation-based lazy release consistent(LRC) memory model [3] is assumed, and the model also employs the multiple-reader, multiple-writer protocol. A number of different memory semantics for the DSM have been proposed, however, in this paper, we focus on the LRC memory model for its enhanced performance. In the LRC memory model, the synchronization operations, such as the acquire, release, barrier, are used to guarantee the correct execution order between the conflicting operations. Also, if a process writes on a data page and releases a lock, other processes can invalidate the old copy of the page and read the new page after it acquires the corresponding lock.


next up previous
Next: Consistent Recovery Up: Background Previous: Background
Park TaeSoon
1999-11-30